/*========================================================================*
 * COPYRIGHT:                                                             *
 *  Freescale Semiconductor, INC. All Rights Reserved. You are hereby     *
 *  granted a copyright license to use, modify, and distribute the        *
 *  SOFTWARE so long as this entire notice is retained without alteration *
 *  in any modified and/or redistributed versions, and that such modified *
 *  versions are clearly identified as such. No licenses are granted by   *
 *  implication, estoppel or otherwise under any patentsor trademarks     *
 *  of Freescale Semiconductor, Inc. This software is provided on an      *
 *  "AS IS" basis and without warranty.                                   *
 *                                                                        *
 *  To the maximum extent permitted by applicable law, Freescale          *
 *  Semiconductor DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED,    *
 *  INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A      *
 *  PARTICULAR PURPOSE AND ANY WARRANTY AGAINST INFRINGEMENT WITH REGARD  *
 *  TO THE SOFTWARE (INCLUDING ANY MODIFIED VERSIONS THEREOF) AND ANY     *
 *  ACCOMPANYING WRITTEN MATERIALS.                                       *
 *                                                                        *
 *  To the maximum extent permitted by applicable law, IN NO EVENT        *
 *  SHALL Freescale Semiconductor BE LIABLE FOR ANY DAMAGES WHATSOEVER    *
 *  (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS,  *
 *  BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER         *
 *  PECUNIARY LOSS) ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE.  *
 *                                                                        *
 *  Freescale Semiconductor assumes no responsibility for the             *
 *  maintenance and support of this software                              *
 *                                                                        *
 **************************************************************************/

#define OSDTRRX_EL1		S2_0_c0_c0_2
#define MDCCINT_EL1		S2_0_c0_c2_0
#define MDSCR_EL1		S2_0_c0_c2_2
#define OSDTRTX_EL1		S2_0_c0_c3_2
#define OSECCR_EL1		S2_0_c0_c6_2
#define DBGBVR0_EL1		S2_0_c0_c0_4
#define DBGBVR1_EL1		S2_0_c0_c1_4
#define DBGBVR2_EL1		S2_0_c0_c2_4
#define DBGBVR3_EL1		S2_0_c0_c3_4
#define DBGBVR4_EL1		S2_0_c0_c4_4
#define DBGBVR5_EL1		S2_0_c0_c5_4
#define DBGBVR6_EL1		S2_0_c0_c6_4
#define DBGBVR7_EL1		S2_0_c0_c7_4
#define DBGBVR8_EL1		S2_0_c0_c8_4
#define DBGBVR9_EL1		S2_0_c0_c9_4
#define DBGBVR10_EL1		S2_0_c0_c10_4
#define DBGBVR11_EL1		S2_0_c0_c11_4
#define DBGBVR12_EL1		S2_0_c0_c12_4
#define DBGBVR13_EL1		S2_0_c0_c13_4
#define DBGBVR14_EL1		S2_0_c0_c14_4
#define DBGBVR15_EL1		S2_0_c0_c15_4
#define DBGBCR0_EL1		S2_0_c0_c0_5
#define DBGBCR1_EL1		S2_0_c0_c1_5
#define DBGBCR2_EL1		S2_0_c0_c2_5
#define DBGBCR3_EL1		S2_0_c0_c3_5
#define DBGBCR4_EL1		S2_0_c0_c4_5
#define DBGBCR5_EL1		S2_0_c0_c5_5
#define DBGBCR6_EL1		S2_0_c0_c6_5
#define DBGBCR7_EL1		S2_0_c0_c7_5
#define DBGBCR8_EL1		S2_0_c0_c8_5
#define DBGBCR9_EL1		S2_0_c0_c9_5
#define DBGBCR10_EL1		S2_0_c0_c10_5
#define DBGBCR11_EL1		S2_0_c0_c11_5
#define DBGBCR12_EL1		S2_0_c0_c12_5
#define DBGBCR13_EL1		S2_0_c0_c13_5
#define DBGBCR14_EL1		S2_0_c0_c14_5
#define DBGBCR15_EL1		S2_0_c0_c15_5
#define DBGWVR0_EL1		S2_0_c0_c0_6
#define DBGWVR1_EL1		S2_0_c0_c1_6
#define DBGWVR2_EL1		S2_0_c0_c2_6
#define DBGWVR3_EL1		S2_0_c0_c3_6
#define DBGWVR4_EL1		S2_0_c0_c4_6
#define DBGWVR5_EL1		S2_0_c0_c5_6
#define DBGWVR6_EL1		S2_0_c0_c6_6
#define DBGWVR7_EL1		S2_0_c0_c7_6
#define DBGWVR8_EL1		S2_0_c0_c8_6
#define DBGWVR9_EL1		S2_0_c0_c9_6
#define DBGWVR10_EL1		S2_0_c0_c10_6
#define DBGWVR11_EL1		S2_0_c0_c11_6
#define DBGWVR12_EL1		S2_0_c0_c12_6
#define DBGWVR13_EL1		S2_0_c0_c13_6
#define DBGWVR14_EL1		S2_0_c0_c14_6
#define DBGWVR15_EL1		S2_0_c0_c15_6
#define DBGWCR0_EL1		S2_0_c0_c0_7
#define DBGWCR1_EL1		S2_0_c0_c1_7
#define DBGWCR2_EL1		S2_0_c0_c2_7
#define DBGWCR3_EL1		S2_0_c0_c3_7
#define DBGWCR4_EL1		S2_0_c0_c4_7
#define DBGWCR5_EL1		S2_0_c0_c5_7
#define DBGWCR6_EL1		S2_0_c0_c6_7
#define DBGWCR7_EL1		S2_0_c0_c7_7
#define DBGWCR8_EL1		S2_0_c0_c8_7
#define DBGWCR9_EL1		S2_0_c0_c9_7
#define DBGWCR10_EL1		S2_0_c0_c10_7
#define DBGWCR11_EL1		S2_0_c0_c11_7
#define DBGWCR12_EL1		S2_0_c0_c12_7
#define DBGWCR13_EL1		S2_0_c0_c13_7
#define DBGWCR14_EL1		S2_0_c0_c14_7
#define DBGWCR15_EL1		S2_0_c0_c15_7
#define MDRAR_EL1		S2_0_c1_c0_0
#define OSLAR_EL1		S2_0_c1_c0_4
#define OSLSR_EL1		S2_0_c1_c1_4
#define OSDLR_EL1		S2_0_c1_c3_4
#define DBGPRCR_EL1		S2_0_c1_c4_4
#define DBGCLAIMSET_EL1		S2_0_c7_c8_6
#define DBGCLAIMCLR_EL1		S2_0_c7_c9_6
#define DBGAUTHSTATUS_EL1	S2_0_c7_c14_6
#define MDCCSR_EL0		S2_3_c0_c1_0
#define DBGDTR_EL0		S2_3_c0_c4_0
#define DBGDTRRX_EL0		S2_3_c0_c5_0
#define DBGDTRTX_EL0		S2_3_c0_c5_0
#define DBGVCR32_EL2		S2_4_c0_c7_0

#define MIDR_EL1		S3_0_c0_c0_0
#define MPIDR_EL1		S3_0_c0_c0_5
#define REVIDR_EL1		S3_0_c0_c0_6
#define ID_PFR0_EL1		S3_0_c0_c1_0
#define ID_PFR1_EL1		S3_0_c0_c1_1
#define ID_DFR0_EL1		S3_0_c0_c1_2
#define ID_AFR0_EL1		S3_0_c0_c1_3
#define ID_MMFR0_EL1		S3_0_c0_c1_4
#define ID_MMFR1_EL1		S3_0_c0_c1_5
#define ID_MMFR2_EL1		S3_0_c0_c1_6
#define ID_MMFR3_EL1		S3_0_c0_c1_7
#define ID_ISAR0_EL1		S3_0_c0_c2_0
#define ID_ISAR1_EL1		S3_0_c0_c2_1
#define ID_ISAR2_EL1		S3_0_c0_c2_2
#define ID_ISAR3_EL1		S3_0_c0_c2_3
#define ID_ISAR4_EL1		S3_0_c0_c2_4
#define ID_ISAR5_EL1		S3_0_c0_c2_5
#define MVFR0_EL1		S3_0_c0_c3_0
#define MVFR1_EL1		S3_0_c0_c3_1
#define MVFR2_EL1		S3_0_c0_c3_2
#define ID_AA64PFR0_EL1		S3_0_c0_c4_0
#define ID_AA64PFR1_EL1		S3_0_c0_c4_1
#define ID_AA64DFR0_EL1		S3_0_c0_c5_0
#define ID_AA64DFR1_EL1		S3_0_c0_c5_1
#define ID_AA64AFR0_EL1		S3_0_c0_c5_4
#define ID_AA64AFR1_EL1		S3_0_c0_c5_5
#define ID_AA64ISAR0_EL1	S3_0_c0_c6_0
#define ID_AA64ISAR1_EL1	S3_0_c0_c6_1
#define ID_AA64MMFR0_EL1	S3_0_c0_c7_0
#define ID_AA64MMFR1_EL1	S3_0_c0_c7_1
#define CCSIDR_EL1		S3_1_c0_c0_0
#define CLIDR_EL1		S3_1_c0_c0_1
#define AIDR_EL1		S3_1_c0_c0_7
#define CSSELR_EL1		S3_2_c0_c0_0
#define CTR_EL0			S3_3_c0_c0_1
#define DCZID_EL0		S3_3_c0_c0_7
#define VPIDR_EL2		S3_4_c0_c0_0
#define VMPIDR_EL2		S3_4_c0_c0_5
#define SCTLR_EL1		S3_0_c1_c0_0
#define ACTLR_EL1		S3_0_c1_c0_1
#define CPACR_EL1		S3_0_c1_c0_2
#define SCTLR_EL2		S3_4_c1_c0_0
#define ACTLR_EL2		S3_4_c1_c0_1
#define HCR_EL2			S3_4_c1_c1_0
#define MDCR_EL2		S3_4_c1_c1_1
#define CPTR_EL2		S3_4_c1_c1_2
#define HSTR_EL2		S3_4_c1_c1_3
#define HACR_EL2		S3_4_c1_c1_7
#define SCTLR_EL3		S3_6_c1_c0_0
#define ACTLR_EL3		S3_6_c1_c0_1
#define SCR_EL3			S3_6_c1_c1_0
#define CPTR_EL3		S3_6_c1_c1_2
#define MDCR_EL3		S3_6_c1_c3_1
#define TTBR0_EL1		S3_0_c2_c0_0
#define TTBR1_EL1		S3_0_c2_c0_1
#define TCR_EL1			S3_0_c2_c0_2
#define TTBR0_EL2		S3_4_c2_c0_0
#define TCR_EL2			S3_4_c2_c0_2
#define VTTBR_EL2		S3_4_c2_c1_0
#define VTCR_EL2		S3_4_c2_c1_2
#define TTBR0_EL3		S3_6_c2_c0_0
#define TCR_EL3			S3_6_c2_c0_2
#define AFSR0_EL1		S3_0_c5_c1_0
#define AFSR1_EL1		S3_0_c5_c1_1
#define ESR_EL1			S3_0_c5_c2_0
#define AFSR0_EL2		S3_4_c5_c1_0
#define AFSR1_EL2		S3_4_c5_c1_1
#define ESR_EL2			S3_4_c5_c2_0
#define AFSR0_EL3		S3_6_c5_c1_0
#define AFSR1_EL3		S3_6_c5_c1_1
#define ESR_EL3			S3_6_c5_c2_0
#define FAR_EL1			S3_0_c6_c0_0
#define FAR_EL2			S3_4_c6_c0_0
#define HPFAR_EL2		S3_4_c6_c0_4
#define FAR_EL3			S3_6_c6_c0_0
#define PAR_EL1			S3_0_c7_c4_0
#define PMINTENSET_EL1		S3_0_c9_c14_1
#define PMENTENCLR_EL1		S3_0_c9_c14_2
#define PMCR_EL0		S3_3_c9_c12_0
#define PMCNTENSET_EL0		S3_3_c9_c12_1
#define PMCNTENCLR_EL0		S3_3_c9_c12_2
#define PMOVSCLR_EL0		S3_3_c9_c12_3
#define PMSWINC_EL0		S3_3_c9_c12_4
#define PMSELR_EL0		S3_3_c9_c12_5
#define PMCEID0_EL0		S3_3_c9_c12_6
#define PMCEID1_EL0		S3_3_c9_c12_7
#define PMCCNTR_EL0		S3_3_c9_c13_0
#define PMXEVTYPER_EL0		S3_3_c9_c13_1
#define PMXEVCNTR_EL0		S3_3_c9_c13_2
#define PMUSERENR_EL0		S3_3_c9_c14_0
#define PMOVSSET_EL0		S3_3_c9_c14_3
#define PMEVCNTR0_EL0		S3_3_c14_c8_0
#define PMEVCNTR1_EL0		S3_3_c14_c8_1
#define PMEVCNTR2_EL0		S3_3_c14_c8_2
#define PMEVCNTR3_EL0		S3_3_c14_c8_3
#define PMEVCNTR4_EL0		S3_3_c14_c8_4
#define PMEVCNTR5_EL0		S3_3_c14_c8_5
#define PMEVCNTR6_EL0		S3_3_c14_c8_6
#define PMEVCNTR7_EL0		S3_3_c14_c8_7
#define PMEVCNTR8_EL0		S3_3_c14_c9_0
#define PMEVCNTR9_EL0		S3_3_c14_c9_1
#define PMEVCNTR10_EL0		S3_3_c14_c9_2
#define PMEVCNTR11_EL0		S3_3_c14_c9_3
#define PMEVCNTR12_EL0		S3_3_c14_c9_4
#define PMEVCNTR13_EL0		S3_3_c14_c9_5
#define PMEVCNTR14_EL0		S3_3_c14_c9_6
#define PMEVCNTR15_EL0		S3_3_c14_c9_7
#define PMEVCNTR16_EL0		S3_3_c14_c10_0
#define PMEVCNTR17_EL0		S3_3_c14_c10_1
#define PMEVCNTR18_EL0		S3_3_c14_c10_2
#define PMEVCNTR19_EL0		S3_3_c14_c10_3
#define PMEVCNTR20_EL0		S3_3_c14_c10_4
#define PMEVCNTR21_EL0		S3_3_c14_c10_5
#define PMEVCNTR22_EL0		S3_3_c14_c10_6
#define PMEVCNTR23_EL0		S3_3_c14_c10_7
#define PMEVCNTR24_EL0		S3_3_c14_c11_0
#define PMEVCNTR25_EL0		S3_3_c14_c11_1
#define PMEVCNTR26_EL0		S3_3_c14_c11_2
#define PMEVCNTR27_EL0		S3_3_c14_c11_3
#define PMEVCNTR28_EL0		S3_3_c14_c11_4
#define PMEVCNTR29_EL0		S3_3_c14_c11_5
#define PMEVCNTR30_EL0		S3_3_c14_c11_6
#define PMEVTYPER0_EL0		S3_3_c14_c12_0
#define PMEVTYPER1_EL0		S3_3_c14_c12_1
#define PMEVTYPER2_EL0		S3_3_c14_c12_2
#define PMEVTYPER3_EL0		S3_3_c14_c12_3
#define PMEVTYPER4_EL0		S3_3_c14_c12_4
#define PMEVTYPER5_EL0		S3_3_c14_c12_5
#define PMEVTYPER6_EL0		S3_3_c14_c12_6
#define PMEVTYPER7_EL0		S3_3_c14_c12_7
#define PMEVTYPER8_EL0		S3_3_c14_c13_0
#define PMEVTYPER9_EL0		S3_3_c14_c13_1
#define PMEVTYPER10_EL0		S3_3_c14_c13_2
#define PMEVTYPER11_EL0		S3_3_c14_c13_3
#define PMEVTYPER12_EL0		S3_3_c14_c13_4
#define PMEVTYPER13_EL0		S3_3_c14_c13_5
#define PMEVTYPER14_EL0		S3_3_c14_c13_6
#define PMEVTYPER15_EL0		S3_3_c14_c13_7
#define PMEVTYPER16_EL0		S3_3_c14_c14_0
#define PMEVTYPER17_EL0		S3_3_c14_c14_1
#define PMEVTYPER18_EL0		S3_3_c14_c14_2
#define PMEVTYPER19_EL0		S3_3_c14_c14_3
#define PMEVTYPER20_EL0		S3_3_c14_c14_4
#define PMEVTYPER21_EL0		S3_3_c14_c14_5
#define PMEVTYPER22_EL0		S3_3_c14_c14_6
#define PMEVTYPER23_EL0		S3_3_c14_c14_7
#define PMEVTYPER24_EL0		S3_3_c14_c15_0
#define PMEVTYPER25_EL0		S3_3_c14_c15_1
#define PMEVTYPER26_EL0		S3_3_c14_c15_2
#define PMEVTYPER27_EL0		S3_3_c14_c15_3
#define PMEVTYPER28_EL0		S3_3_c14_c15_4
#define PMEVTYPER29_EL0		S3_3_c14_c15_5
#define PMEVTYPER30_EL0		S3_3_c14_c15_6
#define PMCCFILTR_EL0		S3_3_c14_c15_7
#define MAIR_EL1		S3_0_c10_c2_0
#define AMAIR_EL1		S3_0_c10_c3_0
#define MAIR_EL2		S3_4_c10_c2_0
#define AMAIR_EL2		S3_4_c10_c3_0
#define MAIR_EL3		S3_6_c10_c2_0
#define AMAIR_EL3		S3_6_c10_c3_0
#define VBAR_EL1		S3_0_c12_c0_0
#define RVBAR_EL1		S3_0_c12_c0_1
#define RMR_EL1			S3_0_c12_c0_2
#define ISR_EL1			S3_0_c12_c1_0
#define VBAR_EL2		S3_4_c12_c0_0
#define RVBAR_EL2		S3_4_c12_c0_1
#define RMR_EL2			S3_4_c12_c0_2
#define VBAR_EL3		S3_6_c12_c0_0
#define RVBAR_EL3		S3_6_c12_c0_1
#define RMR_EL3			S3_6_c12_c0_2
#define CONTEXTIDR_EL1		S3_0_c13_c0_1
#define TPIDR_EL1		S3_0_c13_c0_4
#define TPIDR_EL0		S3_3_c13_c0_2
#define TPIDRRO_EL0		S3_3_c13_c0_3
#define TPIDR_EL2		S3_4_c13_c0_2
#define TPIDR_EL3		S3_6_c13_c0_2
#define CNTKCTL_EL1		S3_0_c14_c1_0
#define CNTFRQ_EL0		S3_3_c14_c0_0
#define CNTPCT_EL0		S3_3_c14_c0_1
#define CNTVCT_EL0		S3_3_c14_c0_2
#define CNTP_TVAL_EL0		S3_3_c14_c2_0
#define CNTP_CTL_EL0		S3_3_c14_c2_1
#define CNTP_CVAL_EL0		S3_3_c14_c2_2
#define CNTV_TVAL_EL0		S3_3_c14_c3_0
#define CNTV_CTL_EL0		S3_3_c14_c3_1
#define CNTV_CVAL_EL0		S3_3_c14_c3_2
#define CNTHCTL_EL2		S3_4_c14_c1_0
#define CNTHP_TVAL_EL2		S3_4_c14_c2_0
#define CNTHP_CTL_EL2		S3_4_c14_c2_1
#define CNTHP_CVAL_EL2		S3_4_c14_c2_2
#define CNTPS_TVAL_EL1		S3_7_c14_c2_0
#define CNTPS_CTL_EL1		S3_7_c14_c2_1
#define CNTPS_CVAL_EL1		S3_7_c14_c2_2
#define SDER32_EL3		S3_6_c1_c1_1
#define DACR32_EL2		S3_4_c3_c0_0
#define IFSR32_EL2		S3_4_c5_c0_1
#define FPEXC32_EL2		S3_4_c5_c3_0
#define SPSR_EL1		S3_0_c4_c0_0
#define ELR_EL1			S3_0_c4_c0_1
#define SP_EL0			S3_0_c4_c1_0
#define __SPSel			S3_0_c4_c2_0 // "SPSel" macro is problem for asm
#define CurrentEL		S3_0_c4_c2_2
#define DAIF			S3_3_c4_c2_1
#define NZCV			S3_3_c4_c2_0
#define FPCR			S3_3_c4_c4_0
#define FPSR			S3_3_c4_c4_1
#define DSPSR_EL0		S3_3_c4_c5_0
#define DLR_EL0			S3_3_c4_c5_1
#define SPSR_EL2		S3_4_c4_c0_0
#define ELR_EL2			S3_4_c4_c0_1
#define SP_EL1			S3_4_c4_c1_0
#define SPSR_irq		S3_4_c4_c3_0
#define SPSR_abt		S3_4_c4_c3_1
#define SPSR_und		S3_4_c4_c3_2
#define SPSR_fiq		S3_4_c4_c3_3
#define SPSR_EL3		S3_6_c4_c0_0
#define ELR_EL3			S3_6_c4_c0_1
#define SP_EL2			S3_6_c4_c1_0

